1. Field of the Invention
The invention generally relates to power amplifiers (PAs) and more particularly to methods of equalizing the nonlinear output capacitance characteristics of PAs.
2. Prior Art
The output of a power amplifier (PA), for example that of PA 120 shown in FIG. 1 part A, is subject to a large voltage swing and hence to a non-linear behavior of the output capacitance 120 of the PA. In CMOS output stages where devices are often in cascode configuration this effect is complicated by the stack of devices having individual operating regions versus this output swing. The output voltage moves the devices of the output leg of the PA through the entire operating region, namely ON active, ON triode (linear), and OFF regions. This results in a large variation of their device capacitances. Furthermore, as the output voltage travels to the minimum value, i.e., close to 0V, progressively the cascode devices and finally also the main transconductance device enter a deep triode regime, presenting a very small equivalent resistance as compared to the high output impedance characteristic when the output stage devices are in the ON active region of operation.
When the output voltage is large and the output leg devices are active or off, the different drain-to-bulk and source-to-bulk diode capacitances and the gate to channel capacitances are isolated one from the other by a relatively large impedance. Therefore, the PA output capacitance is low, dominated by the last high-voltage (HV) cascode device. When the cascode device goes into the triode region the drain-to-bulk and the source-to-bulk capacitances are essentially merged by the device low on resistance and also add to the drain-to-bulk capacitance of the lower device. Also, the channel capacitance changes contribute to the nonlinearity of the output capacitance of the PA. Overall this increases significantly the PA output capacitance, as the lower devices go into triode region the PA output capacitance continues to increase towards the maximum value. This behavior of the output capacitance versus the output voltage is shown in FIG. 1 part B.
The nonlinear behavior of the output capacitance of the PA has a critical impact on the PA performance. It influences the peak output voltage and thus the maximum voltage stress of the output leg devices, the distortion, the frequency of oscillation of the output cascode device, the impedance matching as well as the harmonic filer performance. This characteristic is encountered in all PA technologies including, but not limited to, MOS, bipolar, HBT, III-V, etc. Therefore, in view of the deficiencies of the prior art, it would be advantageous to provide a solution that overcomes these deficiencies.